1. Field of the Invention
The present invention relates generally to integrated circuits and, more particularly, to initializing nodes of an integrated circuit.
2. Description of the Related Art
Typically, modern integrated circuits incorporate nodes e.g., latch nodes and memory nodes, that may power up in either of two states. These nodes preferably receive predetermined values upon applying power to the integrated circuit. The predetermined values are typically written during an initialization cycle. Writing predetermined values to a memory array generally consumes a significant amount of time, which increases with the size of the memory array. For example, the memory array may be initialized by executing a sequence of individual write instructions to the memory array. The initialization of memory arrays may increase test time of the memory design or delay commencing desired functional activity. Accordingly, there is a need for improved techniques for setting nodes of an integrated circuit to a predetermined value upon applying power to the integrated circuit.